This invention relates to apparatus for reducing pin or terminal count in packaging and particularly to a circuit structure capable of being integrated on a single chip or located on a single board which structure eliminates the necessity for physically wiring or connecting great numbers of terminals together.
Modern technology, due to the use of the integrated circuits as well as the microprocessor and improved logic techniques, has enabled the construction and operation of large and improved systems. A major example of such a system is the modern digital communication system. Such systems are capable of sophisticated operation and afford the servicing of thousands and thousands of subscribers. Such systems will rapidly increase in size and sophistication as the systems continue to service a greater number of subscribers. An example of such a system is the ITT 1240 Digital Exchange. This system is employed in many countries throughout the world and is an example of a modern digital telecommunications network.
The system has been described in the patent literature as well as in various publications. See for example a publication entitled Electrical Communication, Vol. 56, Number 2/3, 1981. In that issue there appears a number of articles describing the 1240 system as manifested and offered for sale by the International Telephone and Telegraph Corporation, the assignee herein. In particular, reference is made to the article entitled ITT 1240 Digital Exchange Advanced Component Technology, by J. Cornu et al on page 161 to page 172, ITT 1240 Digital Exchange-Digital Switching Network by J. M. Cotton et al on pages 148 to 160 and ITT 1240 Digital Exchange-Hardware Description by S. Das et al on pages 135 to 147. As indicated, there are a number of patents which also describe the system and the technology.
In order to keep such systems competitive in price, the designers must consider the best tradeoff between customed designed hardware and custom designed software. For example, in the 1240 system or similar types of communications systems, a custom designed line circuit assembly is a major part of the factory cost of the finished product.
As is known, each subscriber to the system requires a line circuit, and hence if there are 100,000 subscribers, 100,000 line circuits are necessary. It is not yet possible to purchase such a line circuit assembly as a standard card from outside vendors as the system manufacturer requires correct interfaces of the circuit with the rest of the system as well as controlled modes of operation and signalling. Apart from such considerations is the fact that in order to obtain a custom circuit in the form of a custom chip, one must expend a great deal of time and effort and funds. Thus at the present state of technology, to obtain an essentially "bug free" custom chip, one can expect to spend three or more years in development. The long time implies high cost which may be marginally justified only with large quantities. As a partial answer to this problem, the industry has turned to ULA's (Uncommitted Large Arrays) and similar devices. Such devices permit a semi-custom application by employing external wire straps or printed card connections between the pads or terminals on the devices. Thus such devices may contain gates, counters and other logic devices which can be custom wired by the use of the pads on the device and hence be employed for various applications. Presently, there exists a range of devices with increasing numbers of gates and pads. In 1982 a ULA cost of ten dollars was average for a device with 70 to 80 pads or terminals and 1500 gate circuits.
The cost of the multipin or multi terminal package was dominant in the cost of the device. It is also apparent that with time this effect will become more pronounced so that the cost of the ULA device will become asymptotic to the cost of the package realizing that the cost of the circuit chip as a silicon chip will become lower and lower. Furthermore, the complexity imposed on the printed card package with all the external pad connections is difficult to quantify. It makes the layout and card testing more difficult and thus takes quantum jumps in cost, as it forces the designer into multi-layer printed circuit boards and other complicated structures.
It is thus apparent that except where large quantities and long lead times permit complex random logic custom chips to be used, the custom designs are approaching the sum of the costs of the non-silicon or non-circuit part of the equipment. That is, the device package cost, plus the printed card, connector backplates, terminals, enclosures and so on are becoming more and more costly. Apart from this is the large amount of time required to wire such devices into a system due to the increase in pads and terminals. Therefore, it follows that a major reduction in hardware cost will not come from the increased use of the silicon chip in such products as opposed to a simplification of packaging technology. Also, while it might be attractive to consider more semiconductor hardware for routine functions to offset the software development, this trend will be inhibited or encouraged depending on the impact on hardware product cost.
A similar problem once existed in telephone switching systems or exchanges which used space division switching. As technology advanced, there was a limit that circuit structure and cross point cost reduction would achieve and the cost of the actual physical equipment in the switch matrix was approaching the cost of the wiring, back planes, connectors and racks. Thus in the space division system as the system grew and more subscribers were accommodated, the cost of wiring and so on exceeded the cost of the actual circuitry. The solution to this problem was to move into the time domain and provided connectivity by time division switching.
Thus in present modern digital systems, the cost of wiring the integrated circuits and of wiring the backplanes is also exceeding the cost of the components while further requiring longer testing times and in general increasingly higher costs for such systems.
It is, therefore, an object of the present invention to provide apparatus for reducing the amount of wiring and packaging required in digital systems.
It is a further object of this invention to provide apparatus and a method for using a time division bus or busses to connect terminals together and to further provide logic processing of selected data on such terminals and then to employ an output bus to direct such terminal data to system locations.
A main object is to provide a structure which can be employed on a single card and which by means of a few terminals can accommodate a great number of terminal and pin connections to substantially reduce wiring, backplane construction and packaging limitations inherent in modern day digital systems.